Different Types of Interrupt Controllers.

1. What are types of interrupt controllers?

There are many types of interrupt controllers depending upon the different configurations in the interrupt controller hardware. Below are the most common types of interrupt controllers.

• Generic Interrupt Controller (GIC)
• Nested Vector Interrupt Controller (NVIC)
• Vector Interrupt Controller (VIC)
• Wake-up Interrupt Controller (WIC)

2. Generic Interrupt Controller:

This is a common type of interrupt controller used in the multicore environment where inter-processor communication is required. GIC is a non-vectored interrupt controller type. An interrupt ID is a distinction between interrupts. Interrupt request has four states: Active, Pending, Inactive and Active + Pending.

     Below are certain features supported by the GIC:

• Shared Peripheral Interrupt (SPI): One or more interrupt from one or more peripheral sources can be targeted to the multiple cores to share the same interrupt between them.
• Private Peripheral Interrupt (PPI): An Interrupt could also be targeted to a particular core depending upon the core configuration. So this target interrupt stays private for the particular core.
• Software Generated Interrupt (SGI): Some Interrupts triggered from the software will be used for inter-processor communication.
  GIC has both IRQ and FIQ lines to the processor.

3. Nested Vector Interrupt Controller (NVIC):

In NVIC processor doesn’t have to poll the interrupt status register to see the source of an interrupt for handling the interrupt service routine (ISR). There is a predefined mapping in the memory (Vector table area) of ISR where the targeted ISR Callback has to be added in the sequence of an interrupt number to the ISR e.g. interrupt no 19 (VOCTBL[19] = &i2c0_tx_callback) to the I2C0 etc.

NVIC is Lightweight and contains a lesser number of interrupts supported to reduce the interrupt latency and only needs a few kBs of RAM and Flash. It runs with the sub - 100 MHz frequency ideal for the Cortex-M series of the MCUs.

     Below are certain features supported by the NVIC:

• Vectored: Vector Table support for the predefined ISR callback supported. An interrupt is executed directly after the hardware trigger.
• 240 interrupts support.
• 256 interrupt priority levels for each of the 240 supported interrupts.
• Interrupt Preemption/Nesting is supported, e.g. an interrupt can come if we are handling another interrupt: main() ==> ISR_priority1()==> ISR_priority2() ==> main()
• Priority Grouping: Groups are supported for Preemptive interrupts and separate subgroups for non-preemptive interrupts.
• Supports interrupt tail chaining. During the execution of one ISR, the other ISR can be pending and executed later.

4. Vector Interrupt Controller (VIC):

Supports the calling of ISR callback after the interrupt is triggered. VIC has 32 interrupt request inputs support and is programmable to assign them into three categories, FIQ, vectored IRQ, and non-vectored IRQ.

Below are certain features supported by the VIC:

• ISR Interrupt Service Routine direct execution from the Vector table Register.
• Control of re-enabling the interrupt after executing it.
• Supports the priorities

5. Wake-up Interrupt Controller (WIC):

WIC is an optional Hardware supported in the NVIC used to wake up the processor in a few clock cycles and restores the last state of the processor.

WIC is used for the processor to enter/exit the low-power/ultra-low-power modes. WIC has direct hardware signals connected to the power management controller of the processor to control. WIC is not the programable. The only configuration supported is the enable/disable of WIC on an interrupt line.