What is ISR?

Table of Contents

  1. What is ISR?
  2. How ISR works
  3. Context Restoration and Resuming Execution
  4. How ISR is Setup to a function
  5. Key Characteristics of ISRs
  6. Importance of ISRs:

1. What is ISR?

Interrupt Service Routine (ISR) is a specialized function or routine that is called when an interrupt is triggered by a hardware device. When a hardware event occurs, like a timer reaching a specific value or a button being pressed, it sends an interrupt signal to the processor.

During an interrupt, the processor automatically switches to the ISR, which handles the specific task associated with the interrupt (such as reading data from a device or acknowledging the interrupt). ISRs are critical for real-time systems and embedded applications, ensuring that the CPU responds swiftly to hardware events without disrupting normal program flow.

2. How ISR works ?

  • Interrupt Occurrence: A hardware device triggers an interrupt (e.g., timer reaching a specific value, keypress, data arrival from a network interface).
  • Interrupt Controller: The system's interrupt controller detects and prioritizes the interrupt based on its type and configuration.
  • Context Switch: The processor temporarily suspends the current program, saving its state (e.g., program counter, registers) to the stack during a context switch.
  • ISR Execution: Control transfers to the ISR associated with the triggered interrupt. The ISR performs necessary tasks, such as reading device data, acknowledging the interrupt, and initiating further actions.
  • Interrupt Handling: Once the ISR completes its tasks, it signals the interrupt controller that the interrupt has been serviced.
  • Context Restoration: The processor restores the saved state (context) of the interrupted program from the stack.
  • Resuming Execution: The processor resumes executing the interrupted program from where it left off.

3. Context Restoration and Resuming Execution:

1.Context Restoration:

    • The processor restores the previously saved program state (context) from the stack.
    • This involves retrieving the saved program counter and register values to resume execution of the interrupted program.

2.Resuming Execution:

    • The processor resumes execution of the program from the point where it was interrupted, continuing with its normal flow.
    • The interrupted program may now incorporate any changes made by the ISR in response to the hardware event

4. How ISR is Setup to a function:

Function for the ISR is selected by mapping or loading the function address into a predfined hardware memory table called vector table.

1. Vector Table Overview

A vector table is a data structure used by microcontrollers and processors to manage interrupts. It consists of a list of addresses known as interrupt vectors, each corresponding to a specific interrupt source or event.

2. Interrupt Vector Number

Each interrupt source in the system is assigned a unique number, often referred to as an interrupt vector number.

3. Mapping Interrupt Vectors to ISRs

The vector table maps these interrupt vector numbers to the corresponding addresses of the ISRs. For example, if an interrupt vector number n corresponds to a specific interrupt source (such as a timer interrupt), the vector table entry at index n will contain the address of the ISR responsible for handling that interrupt.

4. Processor Configuration

During system initialization or configuration, the processor's interrupt controller is programmed to use the vector table.
The interrupt controller is responsible for detecting and prioritizing interrupts, then fetching the corresponding ISR address from the vector table for handling.

5. Handling an Interrupt

When an interrupt occurs (e.g., a timer reaches a specified value, a key is pressed), the interrupt controller identifies the interrupt source and its associated vector number.
The interrupt controller uses this vector number to index into the vector table and retrieve the address of the corresponding ISR.

5. Key Characteristics of ISRs:

  1. Quick Execution: ISRs are designed to respond rapidly to hardware events, executing tasks efficiently. Lengthy or blocking operations within an ISR can degrade system performance.
  2. Deterministic Behavior: ISRs must behave predictably, completing tasks within defined timeframes. Unpredictable ISR execution times can lead to system instability or missed interrupts.
  3. Minimal Resource Usage: ISRs should use minimal system resources to operate effectively. This involves avoiding excessive memory usage, refraining from blocking other interrupts for extended periods, and maintaining lightweight operations.

6. Example Scenario: In a microcontroller-based system:

  1. A timer interrupt occurs when a predefined time interval elapses.
  2. The processor immediately transfers control to the Timer ISR.
  3. The Timer ISR updates a software counter or performs a periodic task.
  4. Upon completion, normal program execution seamlessly resumes

7. Importance of ISRs:

ISRs are critical for real-time systems and embedded applications that demand timely responses to hardware events. They facilitate efficient multitasking by enabling the CPU to manage multiple tasks concurrently without continuously checking for events.

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In summary, an ISR is a specialized routine that ensures efficient handling of hardware interrupts, allowing real-time systems to manage multiple tasks effectively. Well-designed ISRs are essential for optimizing system performance and responsiveness in embedded systems and hardware-dependent applications.